This invention relates generally to implantable medical devices and more particularly, it relates to an implantable cardiac difibrillator employing a switched capacitor stage having a non-50/50 duty cycle for providing a more efficient and effective manner of operating an operational amplifier. In particular, the present invention is directed to an implantable cardiac defibrillator device which utilizes the switched capacitor stage for processing heart signals from the atrium and/or ventricle.
In general, the basis of switched-capacitor circuits is the utilization of a switch-and-capacitor configuration wherein the switch is toggled at a suitably high rate so that the circuit can be made to effectively simulate a resistance. For an understanding of the operation of switched-capacitor circuits and for the purposes of completeness, reference is made to an article entitled "MOS Switched Capacitor Filters" by R. W. Broderson, P. R. Gray and David A. Hodges in PROC IEEE, Vol. 67 No. 1, Jan. 1979, pp. 61-75.
As practiced in the prior art, a pair of switches are controlled by two clock generators having the same duty cycle of operation but generating non-overlapping control pulses. A graphic representation of the control pulses PH1 and PH2 used to control respective switches are illustrated in FIGS. 1(a) and 1(b). It will be noted that the clock pulses PH1 and PH2 are high for essentially one-half of each cycle and are low for the other part of the cycle. Thus, the clock pulses are operating with a 50 percent duty cycle minus the non-overlapping period.
With reference to the switched capacitor circuit of FIG. 3, it will be assumed that the switches 22, 28, 36 and 42 are driven by the prior art control pulses PH1 (FIG. 1a) and the switches 26, 30, 34 and 40 are driven by the control pulses PH2 (FIG. 1b). It should be apparent that in the acquisition phase when the pulses PH1 are at a high level, the amplifier 12 is driving the capacitors C.sub.LP and C.sub.F as well as any capacitance due to other circuits coupled to the output terminal 18. This results in the need for a relatively large supply of current from the operational amplifier 12. However, in the hold phase when the pulses PH2 are at the high level very little current is demanded of the amplifier since it merely has to counteract the effects of leakage on the output terminal 18.
It has been discovered that by operating the switches in the switched capacitor circuits so as to be closed more than 50 percent of the time during the charge portion of the cycle, the operational amplifier could be operated in a more efficient manner since a small bias current could be used. This provides a longer charge cycle which permits a sufficient time for the voltage on the output terminal of the operational amplifier to reach a stable level with a smaller current drain. Consequently, the bias current of the operational amplifier could be maintained constantly at a relatively low level, thereby reducing power consumption.